- The X-ray image of a dual in-line package (DIP) chip reveals the overall structure clearly: the darkest parts on the top and bottom rows represent the external pins of the chip, while the square with black dots in the center depicts the chip and its die, surrounded by radial fine wires which are the bonding wires.
- In the X-ray image of a dual in-line package (DIP) chip, the wider shadow between the pins and bonding wires indicates the extended portion of the chip pins within the package.
- After removing the packaging of the dual in-line package (DIP) chip, the die is exposed, surrounded by radial golden wires which are pure gold bonding wires connecting the die to the chip pins.
- The X-ray image of a chip.
- Image of the die exposed after removing the packaging of the chip, showing the golden bonding wires.
- X-ray image of a ball grid array (BGA) packaged chip.
- X-ray image of a BGA packaged chip.
- X-ray image of a commonly used SDRAM chip, where the chip pins and bonding wires are clearly visible.
- X-ray image of a 64-pin thin quad flat package (TQFP) packaged chip, with the die, pins, and bonding wires clearly visible.
- Actual view of a 64-pin thin quad flat package (TQFP) packaged chip.
- X-ray image of a gas discharge tube.
- X-ray image of a NAND flash chip packaged in a surface-mount TSOPI-48 package, with the internal structure clearly visible.
- X-ray image of a surface-mount PQFP-128 packaged chip.
- X-ray image of a NAND flash chip packaged in a surface-mount TSOPI-48 package.
- X-ray image of a surface-mount TSSOP-48 packaged chip, showing the chip pins, bonding wires, base holding the die, and die from outside to inside.
- Image of the die under a microscope after removing the packaging of a surface-mount TSSOP-48 packaged chip, with black stripe-like parts around indicating the bonding wires.
- X-ray image of a surface-mount 24-pin wafer-level quad flat package (WQFN) packaged chip.
- Bottom view of the actual surface-mount 24-pin WQFN packaged chip.